Paper Title :Study Of RISC DSP System Design On FPGA

Author :Neha V. Mahajan, J. S. Chitode

Article Citation :Neha V. Mahajan ,J. S. Chitode , (2014 ) " Study Of RISC DSP System Design On FPGA " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 59-61, Volume-2,Issue-3

Abstract : Now a days, most microprocessors and microcontroller designs are based on Reduced Instruction Set Computer (RISC) RISC is design philosophy that has become main stream in scientific and engineering applications. The demand for the Digital Signal Processor (DSP) increases with the advent of personal computer, smart phone, gaming and other multimedia devices. Todays, FPGA s become an important platform that implementing high end DSP processors applications due to their inherent parallelism and fast processing speed. This paper focuses on the study of 32 bit three stage pipelined combined RISC and DSP processor based on FPGA.

Type : Research paper

Published : Volume-2,Issue-3

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