Paper Title
ASIC Implementation of Nand Flash Controller
Abstract
Flash memories are non-volatile in nature and these memories can be electrically erased and reprogrammed. Its
small physical size, low power consumption, high shock resistance and high performance have made. The NAND Flash
memory controller may be an internal device, built into the application processor or host, or designs can incorporate an
external, stand-alone chip. The important applications of NAND flash are the highest-density memory is offered in the
smallest footprint. The important applications of NAND flash are the highest-density memory is offered in the smallest
footprint. The main objective of this paper work is to design and implement ASIC design flow for the NAND flash controller
for SAMSUNG K9F1G08R0A NAND flash Device. It supports the reset, read ID, block erase, page program and page read
commands. The read status command is supported for the program and erases operations. In this dissertation planning to
perform different optimization techniques for simulation, synthesis using Synopsys tool at SAED Process Design Kit 32nm
technology node.
Keywords - ASIC, NAND flash