Comparative Analysis of 6T, 7T, 8T & 9T SRAM in Terms of Low Power Consumption and Delay
In modern world, data storage is becoming more and more significant. Memory is a must for all electronic and
digital gadgets in order to save energy. The idea of "more data in less space" is helpful for boosting system efficiency and
performance. Typically, semiconductor memory is referred to as "SRAM." The term "Static Random Access Memory" can
be shortened. Technology is getting smaller and operating at a quicker pace, which increases complexity and increases
power consumption. The design, analysis, simulation, and comparison of four SRAM cells: 6T, 7T, 8T, and 9T are discussed
in this paper. With the aid of 45nm GPDK technology, the analysis was conducted for low power consumption and delay.
The Cadence Virtuoso tool is used to create schematics, modify layouts, do design rule checking DRC, assess how well
layouts match schematics LVS, and perform RCX.
Keywords - SRAM CELLS, DRC, LVS, RCX, Delay and Low Power Consumption