International Journal of Electrical, Electronics and Data Communication (IJEEDC)
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Statistics report
Feb. 2020
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 84
Paper Published : 1397
No. of Authors : 3784
  Journal Paper

Paper Title
A Full-Swing 10-Bit CMOS Cyclic DA Converter with a Capacitor-Sharing Technique for Automatic Test Equipment

Abstract
This paper describes a CMOS cyclic Digital-to-Analog Converter (DAC) for Automatic Test Equipment (ATE). In the middle of ATE, many kinds of DC reference voltages must be generated by DAC channels. In order to satisfy the DAC requirements, a small-area, a full-swing, and a high-resolution beyond 10-bit are needed. Therefore, a cyclic type DAC with a capacitor-sharing technique is proposed. Further, a full-swing output buffer is also discussed. The proposed DAC has been fabricated with 0.18um, 1-poly, and 5-metal CMOS process. The effective chip size is 0.28mm2 and the power dissipation is about 350uW at 5V power supply. The measured result of SFDR is 63dB, when the input frequency is 1MHz at the sampling frequency of 10MHz. The measured INL is within 1.5LSB and DNL is within 1.0LSB. Index Terms - full-swing, cyclic DAC, capacitor-sharing technique, automatic test equipment (ATE)


Author - Minhyun Jin, Minkyu Song

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