International Journal of Electrical, Electronics and Data Communication (IJEEDC)
eISSN:2320-2084 , pISSN:2321-2950
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Statistics report
Sep. 2020
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 91
Paper Published : 1444
No. of Authors : 3905
  Journal Paper

Paper Title
Implementation of Edge Detection Filter using FPGA

Applications of Real time image processing requires processing on large data of pixels in a given timing constraints. FPGA which is reconfigurable device are capable of reducing execution times by making use of parallelism techniques in image processing algorithms. Implementation of highly parallel system architecture, parallel access of large internal memory banks and optimization of processing element for applications makes FPGA an ideal device for image processing system. Edge detection is an elementary and important tool in image processing applications to extract information from an image as edges consist of meaningful features and contained significant information. Sobel edge detection is gradient based edge detection method used to find edges in an image. This paper presents an implementation of a Sobel edge detection algorithm to find edge pixels in an image using Xilinx Spartan-3E. Keywords- Edge detection, Field Programmable Gate Array (FPGA), Sobel operator, VHDL.

Author - Shraddha Y. Swami, Jayashree S. Awati

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| Published on 2017-08-26
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