Paper Title :Implementation Of 2d Convolution Algorithm On FPGA For Image Processing Application
Author :Sriram V.B., Prasad Sawant, Kavit Kamath, Kanika Wadhwa, Ganesh Gore, Sneha Revankar
Article Citation :Sriram V.B. ,Prasad Sawant ,Kavit Kamath ,Kanika Wadhwa ,Ganesh Gore ,Sneha Revankar ,
(2015 ) " Implementation Of 2d Convolution Algorithm On FPGA For Image Processing Application " ,
International Journal of Electrical, Electronics and Data Communication (IJEEDC) ,
pp. 22-25,
Volume-3,Issue-12
Abstract : Image processing is a growing field with tremendous potential and scope for development. With the advent of
advanced visual technologies, there is a need to have an ultra high speed processing machines to match the quality of the
high definition domain. The high end DSPs have drawbacks and limitations which can be addressed by implementing a
processing unit as a hardware design. An optimum architecture can be developed by prototyping it on Field Programmable
Gate Arrays. An ideal hardware architecture can be designed according to the specific requirement which can outperform the
more generic processors.
Keywords— Convolution, FPGA, Image processing, Pipelining.
Type : Research paper
Published : Volume-3,Issue-12
DOIONLINE NO - IJEEDC-IRAJ-DOIONLINE-3491
View Here
Copyright: © Institute of Research and Journals
|
 |
| |
 |
PDF |
| |
Viewed - 122 |
| |
Published on 2015-12-25 |
|