Paper Title :Comparison Of Single Precision Floating Point Multiplier Using Different Multiplier Algorithms

Author :Bhavesh Sharma, Ruchika Mishra, Nilesh Didwania, Aritra Mitra, Amit Baksi

Article Citation :Bhavesh Sharma ,Ruchika Mishra ,Nilesh Didwania ,Aritra Mitra ,Amit Baksi , (2015 ) " Comparison Of Single Precision Floating Point Multiplier Using Different Multiplier Algorithms " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 106-109, Volume-3, Issue-6

Abstract : This paper contains design of a single precision floating point multiplier by using different 24X24 bit multiplier and then comparing the different floating point multiplier for the various performance parameters. The multipliers included in this comparison are array multiplier, radix 4 booth multiplier, wallace tree multiplier and vedic multiplier. The designs are modeled in Verilog HDL and synthesized based on the TSMC 180nm standard cell library. Comparisons are based on the synthesis result obtained by synthesizing all the multiplier using Cadence Encounter RTL Compiler . Keywords :Floating Point , Floating Point Multiplier

Type : Research paper

Published : Volume-3, Issue-6

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