International Journal of Electrical, Electronics and Data Communication (IJEEDC)
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  Journal Paper

Paper Title :
VHDL Implementation of Manchester Encoder and Decoder

Author :Suchitra Suresh

Article Citation :Suchitra Suresh , (2013 ) " VHDL Implementation of Manchester Encoder and Decoder " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 43-47, Volume-1,Issue-2

Abstract : An implementation of Manchester coding is being described in this paper. Manchester coding technique is a digital coding technique in which all the bits of the binary data are arranged in a particular sequence. The Intersil HD-15530 is a high performance CMOS device intended to service the requirements of MlL-STD-1553 and similar Manchester II encoded, time division multiplexed serial data protocols. This LSI chip is divided into two sections, an Encoder and a Decoder. These sections operate completely independent of each other, except for the Master Reset functions. This circuit meets many of the requirements of MIL-STD- 1553. The Encoder produces the sync pulse and the parity bit as well as the encoding of the data bits. The Decoder recognizes the sync pulse and identifies it as well as decoding the data bits and checking parity. This integrated circuit is fully guaranteed to support the 1MHz data rate of MlL-STD-1553 over both temperature and voltage. It interfaces with CMOS, TTL or N channel support circuitry. The HD-15530 can also be used in many party line digital data communications applications, such as an environmental control system driven from a single twisted pair cable of fiber optic cable throughout the building. The functions of the encoder section of the MED include a microprocessor interface, parallel to serial conversion, frame generation, and NRZ to Manchester encoding. This circuitry can run very fast since it does not require a high-frequency clock. The frame format used is similar to that of a UART. The Manchester decoder limits the maximum frequency of operation of the MED, since it uses a high-frequency clock. The receiver circuitry is more complex, since clock recovery and center sampling is done. Additional receiver functions are frame detection, decoding of Manchester to NRZ, serial to parallel conversion, and a microprocessor interface

Type : Research paper

Published : Volume-1,Issue-2


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