Hardware Accelerated Image Enhancement Filters using FPGA
This paper presents Hardware Accelerated Image Enhancement Filters using an efficient FPGA. For
implementing Real Time Image processing applications generally FPGA are used. Simulation of Image Enhancement Filters
is done using Modelsim Altera. Generally, general purpose processor used by image filtering system are PC based. Filtered
output obtained, from this type of implementation takes more time. Because, this type of system executes instructions in step
by step manner. Parallelism is supported by FPGA. Hence after simulation Image Enhancement Filters are realized using
Spartan 3E FPGA to get output in minimum time. JTAG programmer is used to download program in to Spartan 3E FPGA
kit. RS232 is used for serial communication. Results are displayed on PC.
Keywords- Image Enhancement, FPGA, PC, JTAG programmer, RS232.